The Atlas V system is an OCD and thin film metrology tool for high volume manufacturing, enabling FinFET & Gate-All-Around (GAA) logic, DRAM, and 3D NAND device process control. The Atlas V system combines state of the art optical design with an innovative Ai Diffract™ modeling engine, providing OCD and thin film metrology solutions for measuring complex 3D device structures. The dual channel optical architecture consists of a DUV 4×4 Mueller Matrix (MM) SE and a DUV polarized normal incident reflectometer (NIOCD). Together, they provide rich information for OCD analysis at high precision and high throughput. The Atlas V system is designed to measure the most critical and challenging process steps that include buried features, not visible by CD-SEM and other techniques. With unique capabilities, such as measuring individual nanowire dimension in a GAA logic device, the Atlas V system is an enabling technology for leading edge device process control. Applications: - OCD for litho, etch, CVD & CMP process in all device segments - Local variation - Asymmetry and tilt - Common and critical films - Stress & wafer warpage
Comprehensive mapping suite that covers all aspects of semiconductor processes
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An advanced feed-forward lithography software solution for fan-out panel level packaging that enhances yield and throughput by correcting die placement errors through external measurements, predictive analytics and adaptive shot control. StepFAST® software is Onto Innovation’s advanced lithography software solution tailored for fan-out panel-level packaging, where die placement errors and material instability can significantly impact yield and productivity. StepFAST® software uses a feed-forward adaptive shot approach, integrating high-speed die placement measurements from the Firefly® system and applying real-time corrections to every shot of the JetStep® lithography tool. This external measurement strategy doubles throughput compared to traditional on-tool (self-metrology) methods. The software also incorporates predictive yield analysis, enabling dynamic adjustment of exposure field sizes to balance throughput and overlay accuracy. By automating reticle selection and optimizing field coverage, StepFAST® software ensures efficient panel exposure while minimizing registration errors—from ±50µm down to under ±3µm. With advanced analytics, StepFAST® software transforms lithography into a flexible, high-efficiency process, delivering substantial improvements in yield, throughput, and cost of ownership for panel-level packaging applications. Applications: - Panel-level packaging Featured Markets: - Advanced Packaging Adaptive Shot Lithography Solution: Die shift on reconstituted panels can significantly impact both productivity and yield. To address this challenge, we use a parallel die placement measurement process and advanced analytics to provide a means to balance productivity against yield. Our integrated lithography cell, featuring Firefly inspection, StepFAST software, and JetStep Lithography, delivers industry-leading throughput and yield for fan-out panel level packaging.
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The CnCV system enables wafer-level characterization of WBG materials without test device fabrication, reducing time and cost. As a mercury-free alternative to MCV, it eliminates contamination concerns. The enhanced Kinetic CV mode with UV-assisted corona charge neutralization achieves high throughput and precision for fast, reliable process control. The CnCV system utilizes a novel constant surface potential corona charging, which enables the precision required over a large voltage range.The patented technology includes charge- and photo-assisted modes, especially suited for speed and precision on WBG materials and structures, including SiC,Ga 2 O 3, GaN, and AlGaN/GaN HEMT. Additionally, Corona-Kelvin characterization includes electrical properties of dielectrics and interfaces of films on SiC and GaN epi layers. An automated top-side edge contact (TSEC) is also available enabling characterization of WBG on insulating/semi-insulating substrates. Automated bias-temperature stress (BTS) measurements are also available with the CnCV system, providing a fast, noncontact way to quantify the reliability of passivated SiC and GaN. Beyond typical CV type parameters, the full wafer corona approach allows for QUAD (quality, uniformity, and defect) mapping. The electrical defect imaging, QUAD-EDI, mode is especially designed for SiC. It provides a unique means for quick screening of epi electrical defectivity enabling improvement in device yield prediction. Applications: - Non-contact epi dopant depth profiling in WBG materials - AlGaN\GaN HEMT measurements (pinch off voltage & 2DEG sheet charge) - Dielectric and interface characterization electrical defect imaging in SiC for yield prediction - Bias-temperature stress (BTS) instability measurements on passivated WBG materials Featured Markets: - Bare Wafer & Panel Manufacturing - Specialty
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The FAaST system is a versatile, non-contact electrical metrology platform, with an option to combine micro and macro corona-Kelvin technologies together with digital surface photovoltage (SPV). It enables high-resolution dielectric and interface measurements across a wide range of dielectric materials, supporting both R&D and high volume manufacturing. The primary application of non-contact CV metrology is monitoring dielectric properties during IC manufacturing. Unlike conventional electrical measurements, it requires no sample preparation, eliminating the need for MOS capacitor structures. This reduces metrology cost and enables fast data feedback in both R&D and manufacturing environments. The corona-Kelvin method uses a corona discharge in air to deposit an electric charge (D Q C) on the wafer surface. A vibrating Kelvin-probe then measures the resulting surface voltage (V), enabling determination of the differential capacitance (C=D Q C/D V). By monitoring surface voltage in both dark and illuminated conditions, the system separates two key components: dielectric voltage (V D) and semiconductor surface potential (V SB), enabling determination of flat band voltage (V FB). Analysis of the resulting charge-voltage data yields electrical parameters, including trap density (D it), flat band voltage (V fb), dielectric charge (Q tot), dielectric capacitance (C D), Equivalent Oxide Thickness (EOT), leakage current, and tunneling characteristics. Applications - Plasma damage monitoring - Residual charge and non-visual defect inspection - Diffusion furnace oxide and interface characterization - High-K and low-K dielectric capacitance - Mobile ion mapping - Charge trapping and hysteresis Featured Markets - Bare Wafer & Panel Manufacturing - CMOS Technologies - Specialty - Advanced Packaging
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