By BE Semiconductor Industries N.V.
The Sytron wettable flank immersion tin plating process produces a solderable non peeling pure tin deposit of good visual quality on the exposed QFN copper lead sidewalls with the following properties: - 2 to 3 μm tin on tin plated and full copper surface QFN packages. - Passes standard zero hour, 8 h steam aging and 16 h oven bake solderability tests. - 0.5 to 1.5 μm residual tin layer after intermetallic formation in 8 h steam aging and 16 h oven bake. - 100% solder fillet height after ceramic glass test. The immersion tin plating process of Sytron deposits considerably thicker tin layers compared to standard self-limiting displacement immersion tin processes. The maximum 1 - 1.5 μm tin plated by standard immersion tin processes is too thin to comply with the durability requirements of tin solder finishes in the automotive market. Even at room temperature copper-tin intermetallic compounds grow by copper-tin interdiffusion at the cost of the plated tin. A 1 to 1.5 μm tin layer leaves too little unreacted tin to form a reliable solder joint after storage between package manufacturing and PCB mounting.
