By Intlvac
IC Structure and Composition ICs are small chips with areal sizes ranging from 4mm x 4mm to as large as 25mm x 25mm. They use a silicon substrate base on which extremely thin layers of electronic materials are deposited to create components in microelectronic circuits. These layers, which are typically micrometers to nanometers thick, consist of a complex array of conductive metals, insulating dielectrics, and semiconductor materials. The number of layers in an IC usually ranges from 5 to 12. A simple single passive layer, for example, may contain aluminum or copper lines and posts, surrounded by a thin barrier layer composed of tantalum- or titanium-based materials, all embedded in a silicon-based dielectric compound matrix. Purpose and Process of Delayering In order to analyze failure modes or reverse engineer these complex IC structures, the ability to precisely and uniformly expose the layers, one by one, is critical. By the necessity of IC construction, the layers typically exposed first are the top BEOL (Back End of Line) and "packaging" layers. Methodically, deeper layers are reached as the process removes one layer at a time, progressing down to the FEOL (Front End of Line) layers. This sequential removal technique is called "delayering." Traditional and standard delayering methods are now encountering significant limitations when applied to contemporary IC chip designs. With the Athena Nanoquest I, we overcome these challenges with ease. BEFORE ETCH Figure 1. A prepared contemporary integrated circuit (IC) chip before the etching process. Modern chips are densely populated with ultra-thin layers and compact structures. The challenge in delayering lies in the precise removal of material at the micrometer, nanometer, and even atomic scale — a task ideally suited to the Athena Nanoquest I Ion Beam Etch platform. AFTER ETCH Figure 2. The same integrated circuit (IC) chip following a single etch process in the Athena Nanoquest I. The ion beam has uniformly delayered the entire surface, delivering a clean, non-contact process that is chemistry-free and preserves delicate device structures. Challenges of Delayering With the microelectronics market pushing for more powerful and densely packed IC designs, the challenge arises as layer thicknesses shrink and structures within those layers become more compact. Existing methods to delayer such advanced IC chips are increasingly costly, error-prone, and of limited utility. To successfully conduct failure analysis and reverse engineering on modern IC chips, the delayering process requires innovative material removal techniques capable of precisely removing nanometer-level amounts of material uniformly across the entire chip. The primary goal of delayering is to expose the constituents of an IC chip in a single, uniform plane. A failed step in this process can penetrate adjacent layers, revealing materials and structures not relevant to the target plane. Successful delayering techniques must create smooth and uniform planar surfaces, accomplished on either the micrometer, nanometer, or even atomic scale. This challenge is amplified by the variety of distinct materials present within an IC layer, each of which behaves differently during material removal due to its unique physical properties. Efficient material removal processes must account for these differences while achieving precise control, consistency, and a high-quality planar surface across the chip. Delayering employs various methods to meet these demands, ensuring removal rates are controlled to produce a common planar surface suitable for failure analysis and measurement. Athena Advantages Universal Material Removal IBE can physically remove any type of material through a process called sputtering, making it a universal etching method. Metals, alloys, insulators, semiconductors, carbon-based materials, and complex multilayer composites can all be targeted. Additionally, IBE achieves precise control over material removal by adjusting ion beam properties, such as energy levels, ion current density, and incidence angle, which fundamentally impact the sputtering process. Material Selectivity By selecting the appropriate feed gases for the ion beam etching process, material removal rates can be optimized, allowing for preferential etching of one material over another. This capability, known as material etch selectivity, enables uniform removal of diverse materials present in an IC layer, leading to the smooth, planar surfaces required for effective analysis. Nanometer-Scale Precision While IBE can remove tens of micrometers of thick material, such as upper passivation layers, its ability to remove material at atomic levels is a game-changer for the field of IC delayering. The precision and repeatability of IBE allow it to achieve nanometer-scale resolution, significantly minimizing errors such as undershooting or overshooting the desired layer. IBE vs Traditional Surface Planarization Many IC chips have surface layers that are not initially flat but instead contain protruding features. IBE excels in such situations by using controlled ion beam angles to selectively target and remove elevated structures, ultimately achieving a smooth and uniform planar surface. Unlike mechanical polishing methods, which rely on slurries and physical force, IBE removes material at the molecular or atomic scale. Large Area Uniformity The broad size of the ion beam is well-suited for processing IC chips, which are typically small (up to 25mm x 25mm). IBE ensures uniform material removal across the entire chip, achieving less than 1% non-uniformity. This capability allows for the consistent propagation of planar layers deeper into the IC structure. Non-Invasive Process Compared to traditional methods, IBE minimizes disruptive side effects that can distort the IC layers or compromise subsequent measurements. For instance: - Mechanical Polishing runs the risk of surface contamination or residual mechanical damage. - Wet Chemical Etching can result in corrosion or fluid percolation into lower layers. - Dry Plasma Etching exposes IC chips to high-density plasma, heat, and radiation, which may alter surface materials. IBE avoids these challenges by minimizing exposure to bulk plasma, heat, and radiation, thus preserving the integrity of the IC chip's materials.
