Edge couplers for efficient input and output of light. Available in MPW and dedicated runs. We use a deep-etch process to create smooth trenches around the perimeter of the chip. This allows for efficient edge-coupling of light into nano-tapered waveguides and sub-wavelength gratings. The trench is patterned around an 8.78 x 8.78 mm area centered on the submitted GDSII design. The deep-etch process is used to remove the cladding, buried oxide, and 250 microns of the silicon substrate, while creating smooth facets in the silicon device layer. The remaining silicon substrate is diced with a saw. The final result is die with clearance on all four sides for fiber edge-coupling. The deep trench process can also be used for fabrication of thermal isolation trenches. Trenches as deep as 100 µm can be etched all the way into the handle silicon. This process enables fabrication of thermal isolation trenches in photonic integrated circuits which effectively minimizes thermal crosstalk.
