NW
Packaging & AssemblyFabrication & Surface Engineering

Anodic Bonding

By Applied Microengineering Ltd.

Anodic bonding is a method of hermetically and permanently joining glass to silicon without the use of adhesives. The silicon and glass wafers are heated to a temperature (typically in the range 300-500°C depending on the type of glass) at which the alkali-metal ions in the glass become mobile. The wafers are brought into contact and a high voltage applied across them, causing the alkali cations to migrate from the interface, creating a depletion layer with high electric field strength. The resulting electrostatic attraction brings the silicon and glass into intimate contact. Further current flow of the oxygen anions from the glass to the silicon results in an anodic reaction at the interface and the result is a permanent chemical bond between the glass and silicon. Advantages of Anodic Bonding: - No interlayer required - High strength bond - higher than the fracture strength of glass - Relatively low bonding temperature providing more design flexibility - Maintains integrity of any structures in the glass and silicon wafers - No measurable flow of the glass occurs, enabling sealing around previously machined grooves, cavities etc. without any loss of dimensional tolerances - Since glass is an electrical insulator, parasitic capacitances are minimal - Hermetic seals. The bonding process can readily be performed under vacuum, allowing hermetically-sealed reference cavities to be formed, or under a controlled atmosphere for the encapsulation of gases - The transparency of glass at visible wavelengths enables simple, highly accurate, alignment of pre-patterned glass and silicon wafers. This transparency can also be exploited via optical addressing, and allows viewing of micro-fluidic devices - High yield process. Tolerant to particle contamination and wafer warp: the electrostatic field generates a high clamping force which overcomes these surface irregularities - A low-cost wafer-scale process for first order packaging can be achieved at chip level if required - Multi-layer stacks allow an easy route to complex 3-D microstructures Disadvantages: - Requires one wafer to be high in alkali ions, glass material - Not compatible with CMOS - Wafers are exposed to high voltage and temperature Applications: - MEMS – pressure sensors, accelerometers, micropumps, actuators - Microfluidic devices - Atomic clocks