By IBM Research
IBM is announcing plans to make available an early research and development process design kit, or PDK, for the 7-angstrom nanostack technology in the first quarter of 2027. As the industry stands on the verge of this new era in semiconductor design, the PDK is intended to give organizations an early opportunity to explore how this emerging architecture can change their offerings. A PDK provides the models, design rules, libraries, and other information engineers need to begin designing chips for a particular manufacturing process. IBM’s planned offering will help semiconductor companies evaluate nanostack technology well before it is ready for widespread adoption. Potential collaborators include fabless chip companies, electronic design automation (EDA) vendors, equipment suppliers, and research organizations interested in developing the technology. The first version of the PDK is expected to include exemplary standard-cell libraries for logic functions and an exemplary SRAM design. Circuit designers will be able to use these resources to investigate placement and routing, produce early block-level layouts, and evaluate potential density and power-performance characteristics. The initial release will not contain every model that a mature commercial PDK would include. Instead, it will advance collaborative research, establishing for the first time a foundation for design-technology co-optimization in a technology’s early phase on an open hardware innovation platform. For prospective partners, early access to the nanostack PDK offers more than a preview of a future transistor. It creates an opportunity to investigate how nanostack technology might be optimized for specific products. EDA companies can begin adapting their design tools to the architecture, while equipment makers can study the specialized fabrication challenges associated with its structure. Researchers can also explore areas such as parasitic extraction, thermal coupling, and device-to-device interactions as the technology develops.
