Memory for future wearable electronics

Last March, the artificial intelligence (AI) program AlphaGo beat Korean Go champion LEE Se-Dol at the Asian board game. "The game was quite tight, but AlphaGo used 1200 CPUs and 56,000 watts per hour, while Lee used only 20 watts. If a hardware that mimics the human brain structure is developed, we can operate artificial intelligence with less power," points out Professor YU Woo Jong. In collaboration with Sungkyunkwan University, researchers from the Center for Integrated Nanostructure Physics within the Institute for Basic Science (IBS), have devised a new memory device inspired by the neuron connections of the human brain. The research, published in Nature Communications, highlights the devise's highly reliable performance, long retention time and endurance. Moreover, its stretchability and flexibility makes it a promising tool for the next-generation soft electronics attached to clothes or body.

The brain is able to learn and memorize thanks to a huge number of connections between neurons. The information you memorize is transmitted through synapses from one neuron to the next as an electro-chemical signal. Inspired by these connections, IBS scientists constructed a memory called two-terminal tunnelling random access memory (TRAM), where two electrodes, referred to as drain and source, resemble the two communicating neurons of the synapse. While mainstream mobile electronics, like digital cameras and mobile phones use the so-called three-terminal flash memory, the advantage of two-terminal memories like TRAM is that two-terminal memories do not need a thick and rigid oxide layer. "Flash memory is still more reliable and has better performance, but TRAM is more flexible and can be scalable," explains Professor Yu.

TRAM is made up of a stack of one-atom-thick or a few atom-thick 2D crystal layers: One layer of the semiconductor molybdenum disulfide (MoS2) with two electrodes (drain and source), an insulating layer of hexagonal boron nitride (h-BN) and a graphene layer. In simple terms, memory is created (logical-0), read and erased (logical-1) by the flowing of charges through these layers. TRAM stores data by keeping electrons on its graphene layer. By applying different voltages between the electrodes, electrons flow from the drain to the graphene layer tunnelling through the insulating h-BN layer. The graphene layer becomes negatively charged and memory is written and stored and vice versa, when positive charges are introduced in the graphene layer, memory is erased.

IBS scientists carefully selected the thickness of the insulating h-BN layer as they found that a thickness of 7.5 nanometers allows the electrons to tunnel from the drain electrode to the graphene layer without leakages and without losing flexibility.

Flexibility and stretchability are indeed two key features of TRAM. When TRAM was fabricated on flexible plastic (PET) and stretachable silicone materials (PDMS), it could be strained up to 0.5% and 20%, respectively. In the future, TRAM can be useful to save data from flexible or wearable smartphones, eye cameras, smart surgical gloves, and body-attachable biomedical devices.

Last but not least, TRAM has better performance than other types of two-terminal memories known as phase-change random-access memory (PRAM) and resistive random-access memory (RRAM).

Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio (Open) Quoc An Vu, Yong Seon Shin, Young Rae Kim, Van Luan Nguyen, Won Tae Kang, Hyun Kim, Dinh Hoa Luong, Il Min Lee, Kiyoung Lee, Dong-Su Ko, Jinseong Heo, Seongjun Park, Young Hee Lee & Woo Jong Yu Nature Communications 7, Article number: 12725 (2016) doi:10.1038/ncomms12725

Institute for Basic Science (IBS)

#Nanostructures #Graphene

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