NW
Packaging & AssemblyFabrication & Surface Engineering

Pad Redistribution (RDL)

By TLMI Corporation

RDL Layout Guidelines for wafer level chip scale packaging VIA 1 Repassivation Minimum Opening 30 µm Minimum Overlap (Inside Existing Passivation)7 µm per side Polyimide Thickness 3 – 5 µm standard Traces Material / Standard Thickness / Minimum Overlap (Outside Via 1 Passivation) / Minimum trace width 10 um (not on pad) / Minimum trace spacing: Aluminum 2 um (4 um avail); Overlap 7 um per side; Minimum trace width 10 um (not on pad); Minimum trace spacing 11 um Copper/Nickel 3 um / 2 um; Overlap 8 µm per side, 10 um preferred; Minimum trace width 25 µm (not on pad); Minimum trace spacing 20 µm Copper (experimental) 3 um; Overlap 8 µm per side, 10 um preferred; Minimum trace width 10 um (not on pad); Minimum trace spacing 20 µm Gold 3 um; Overlap 7 µm per side; Minimum trace width 10 um (not on pad); Minimum trace spacing 20 µm VIA 2 Passivation Bump / Pad Type: Solder Bump, Gold Bump, Indium Bump, Cu/Ni/Au Pad Polyimide Thickness 3 – 5 µm standard Minimum opening width 30 um Minimum spacing: Solder Bump 40 um; Gold Bump 32 um; Indium Bump 32 um; Cu/Ni/Au Pad 40 um